IRQL and CPU rings?

How do these two fit together?

Look at this cool picture showing the IRQL priorities: http://www.winntmag.com/Files/298/Table_01.html


NOTE: There is a reserved level (31), it's even higher than power event!

If you thought ring-0 means (high priority), does it still seem so high when you look at the bigger picture? I don't know.

So, what I want to know is: Is the hierarchy of CPU rings just a part of a much larger hierarchy (IRQL)?

IRQL is just an interrupt priority - it is defined by operating system, CPU doesn't know anything about it. And CPU rings are not "priorities", they are different privilege/access modes.

Interrupt Request Level (IRQL)

The priority ranking of an interrupt. A processor has an IRQL setting that threads can raise or lower. Interrupts that occur at or below the processor's IRQL setting are masked and will not interfere with the current operation. Interrupts that occur above the processor's IRQL setting take precedence over the current operation.

The particular IRQL at which a piece of kernel-mode code executes determines its hardware priority. Kernel-mode code is always interruptible: an interrupt with a higher IRQL value can occur at any time, thereby causing another piece of kernel-mode code with the system-assigned higher IRQL to be run immediately on that processor. In other words, when a piece of code runs at a given IRQL, the Kernel masks off all interrupt vectors with a lesser or equal IRQL value on the microprocessor.

IRQL vs.Cpu Rings:

For x86 cpu, it has 4 rings: 0, 1, 2, 3

Every ring defines it��s privilege, such as memory page access, io access �� Windows only uses ring0 and ring3. Kernel uses ring0, and user routines use ring3.

IRQL only exists in kernel space. For user space, it��s meaningless. All user threads are running at PASSIVE_LEVEL, though they can result in a task switch to kernel space and change the IRQL. They could not access the IRQL directly.